目前有個應(yīng)用需要產(chǎn)生如下時序:在電源5V上電后(大于4V左右),首先延遲約500ms(20%誤差)產(chǎn)生一個低到高電平,然后再延遲50ms(10%誤差)左右產(chǎn)生一個低到高的電平。即一路輸入(5V電源),兩路輸出(延遲上電信號)。一旦5V掉電,兩路輸出復(fù)位為低。
電源5V :___|``````````````````````````````````````````````|______
輸出1 :____________|``````````````````````````````|______
輸出2 :____________________|````````````````|______
時間 : |---500ms--|---50ms--|
請問如何挑選電源監(jiān)控芯片來滿足該時序,希望芯片體積盡量小,電路盡量簡單,有何芯片可推薦?